Frequency pulse width modulation technology applications in the inverter

Because of the high frequency pure sine wave inverter pursuit of hard switching inherent flaws become intolerable: big turn-on and turn-off losses; capacitive open question; diode reverse recovery problems; inductive shutdown problems; hard switching circuit EMI problem. Therefore, it is necessary to seek a better solution to minimize or eliminate the problems caused by hard switching. Soft-switching technology is an effective way to overcome the above defects. Ideally soft opening process is: first the voltage drops to zero, the current state and then slowly rises to values ​​close to zero opening loss. Due before the opening of the power tube voltage has dropped to zero, and its junction voltage on the capacitor that is zero, so to solve the compatibility problems opening also means that the diode has ended, the reverse recovery process is over, so the diode reverse recovery Problems also exist. Ideally soft turn-off process: current first drops to zero, the voltage then slowly rise to the off-state value, so turn-off loss is approximately zero. Since the power is off before the current has dropped to zero, that line inductor current is also zero, so the inductive shutdown problem is resolved.

Based on this, this paper investigates to put forward a method for full-bridge inverter, HPWM control mode ZVS soft-switching technology, shown in Figure 1. Its starting point is to try not to change the hard-switching topologies that do not increase as much as possible to increase the auxiliary components or less under the premise of effective use of existing components and power control circuit parasitics, as the main power transistor dc ac converter bridge ZVS soft-creation switching condition, to maximize ZVS, so as to reduce losses, reduce EMI, the purpose of improving reliability.

2 HPWM control mode to achieve ZVS works

Considering junction capacitance of MOS output transistors and non-linear discrete values, each a small capacitor MOS transistors in parallel, including the junction capacitance to absorb its equivalent C1-C4, and C1 = C2 = C3 = C4 = Ceff; D1- D4 is the body diode of the MOS tube, then HPWM soft switching mode in the whole cycle of the output voltage of a total of 12 kinds of switching states. Based on the positive and negative half-cycle symmetry of the two leg work, to output a voltage positive half cycle, for example, the equivalent circuit model shown in Figure 2. Figure 3 shows the output voltage of the positive half cycle of a switching waveform of the primary circuit, this time often through S4, S2 is turned off. Since the carrier frequency is much larger than the output voltage fundamental frequency, in a switching period Ts that the output voltage Uo remain approximately constant, the inductor current instantaneous adjacent extreme constant switching cycle.